New DFPMU-DP Double Precision Floating Point Coprocessor.

10-May-2006 - the Intellectual Property (IP) provider - Digital Core Design today has announced the release of a new - DFPMU-DP - Double Precision Floating Point Coprocessor.

The DFPMU-DP is a 64-bit Double Precision Floating Point Coprocessor, designed to assist CPU in performing the IEEE754 single and double precision floating point mathematic computations. The DFPMU-DP directly replaces C software functions, by equivalent , very fast hardware operations, which significantly accelerate system performance. It doesn't require any programming, so it also doesn't require any modifications made in main software. Everything is done automatically during software compilation by the DFPMU-DP C Driver.

The DFPMU-DP was designed to operate with DCD's DP8051/DP80390 microcontrollers, but can also operate with any other 8-, 16- and 32-bit processor. Drivers for all popular 8051 C compilers are delivered together with the DFPMU-DP package. The DFPMU-DP supports also a popular 32 Bit procesors: NIOS II and MicroBlaze, and the C drivers for those processors are delivered with the DFPMU-DP for free.
The DFPMU-DP uses the specialized CORDIC and standard algorithms to compute math functions.

The DFPMU-DP executes 21 operations in such groups as:

  • arithmetic functions,
  • trigonometric functions,
  • comparison functions,
  • data conversion.


It supports addition, subtraction, multiplication, division, square root, comparison and trigonometric functions: sine, cosine, tangent and arctangent. It has built-in conversion instructions from integer type to floating point type and vice versa. The input numbers format is according to IEEE-754 standard. DFPMU-DP supports both single and double precision real numbers, 16-bit, 32-bit and 52-bit integers

Each floating point function can be turned on/off at configuration level providing the flexible scalability of DFPMU-DP module. It allows to save silicon space and provides exact configuration required by a certain application. DFPMU-DP is a technology independent design that can be implemented in a variety of process technologies, in applications such as:
  • math coprocessors
  • DSP algorithms
  • embedded arithmetic coprocessor
  • fast data processing & control.


Using the DFPMU-DP as a coprocessor for particular CPU, can significantly reduce an arithmetic operation computation time and thus increase whole system performance. Typical system performance improvement for 32-Bit RISC Processors system (NIOS II / MicroBlaze) is 55 times.

For more information please see DCD web site.




About Digital Core Design


DCD is a private Intellectual Property (IP) Core provider and System-on-Chip (SoC) design house, an expert in IP cores architecture improvements. DCD sells its products and services directly and through its global distribution network. DCD offers VHDL and Verilog high performance and synthesizable IP cores for a speed optimized 8-, 16- and 32-bit processors, peripherals, serial interfaces, floating point arithmetic units and coprocessors. The functionality of IP solutions offered by DCD were up to date appreciated by over 200 licenses sold to over 150 customers worldwide, such as: INTEL, SIEMENS, PHILIPS, TOYOTA, MAXIM, RAYTHEON, OSRAM, GENERAL ELECTRIC, FARADAY, SAGEM, FLEXTRONICS and GOODRICH. DCD also became a member of first-class branch partner programs as: AMPP of ALTERA, AllianceCORE of XILINX, ispLeverCORE Connection of LATTICE and IP Catalyst of SYNOPSYS. For more information, please visit: www.dcd.pl.